1,同步整流buck converter,vin12V, Vout 1v, when there is load transient procedure, such as load increase, or load decrease, in which case the over shoot is worse?why?
我真没注意到哪个的overshoot大.
2,同步整流buck的low side MOSFET 为什么要并联一个肖特级diode?
为什么可以达到提高效率的目的?
我知道为什么,确不知道原因
3,在死区时间,上下两个MOSFET是什么状态?low side mosfet 的body diode和并联的 shottky diode 是什么状态?
我知道有些chip提供这个死区时间的调整,但具体什么状态包括diode的状态确实是no idea
4,low side mosfet body diode and shottky diode 谁先导通,然后最后谁承担电流?为什么?
没答出为什么、:(
5,选择crossover frequency 时有什么极限限制?
我就知道应该选在10%-20% switching frequency, 不知道这限制是什么及其理论.通常这种buck run at 1MHZ 以上
没作过同步整流的buck covnerter, 回答得一塌糊涂,惨.
工作难找呀.
谢谢你指导
昨天电话面试,有几个问题请教各位,谢谢
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@jackyluo
1.decrease2.yingweimosfetdebinnianerjiguanyajiangda,fangxianghuifushijianda3off, on4.xiaotieji,yajiangwenti5.香容定理
thanks man, but..but.. your post is really hard to read.
1. I also think the over shoot in load decrease is worse.
the reason might be that vout=1, vin=12, that means the duty is very small. so when the load increase ,the duty cycle won't decrease furth. so the overshoot is not that bad. while in load decrease, the duty cycle can increas lot,making bigger overshoot.sigh...I thought through it after the interview, too late...too bad...
2. I know the reason why the efficiency can be increased. but I sitll have no idea why the body conducts first.
3, I reply as both off, body diode on, I am afraid I guess the correct answer.
4, same as 2
5, could you tell me little bit detail.what is the practical limit for the selection of cross over frequency.
one more question I remembered.
Q. the benifits of high frequency.
I answered with small inductor and capacitors
Q more
I answered: increase the transient response
Q more
I don't know another benifit of the high f, I just know the price could be more switching loss and EMI problem? what the other benifits on high frequency???thanks
too bad for my first phone interview, I wish I could get a on-site, which is on Fremont, SF. now I lost it严重郁闷ing
1. I also think the over shoot in load decrease is worse.
the reason might be that vout=1, vin=12, that means the duty is very small. so when the load increase ,the duty cycle won't decrease furth. so the overshoot is not that bad. while in load decrease, the duty cycle can increas lot,making bigger overshoot.sigh...I thought through it after the interview, too late...too bad...
2. I know the reason why the efficiency can be increased. but I sitll have no idea why the body conducts first.
3, I reply as both off, body diode on, I am afraid I guess the correct answer.
4, same as 2
5, could you tell me little bit detail.what is the practical limit for the selection of cross over frequency.
one more question I remembered.
Q. the benifits of high frequency.
I answered with small inductor and capacitors
Q more
I answered: increase the transient response
Q more
I don't know another benifit of the high f, I just know the price could be more switching loss and EMI problem? what the other benifits on high frequency???thanks
too bad for my first phone interview, I wish I could get a on-site, which is on Fremont, SF. now I lost it严重郁闷ing
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@gunking
thanksman,but..but..yourpostisreallyhardtoread.1.Ialsothinktheovershootinloaddecreaseisworse.thereasonmightbethatvout=1,vin=12,thatmeansthedutyisverysmall.sowhentheloadincrease,thedutycyclewon'tdecreasefurth.sotheovershootisnotthatbad.whileinloaddecrease,thedutycyclecanincreaslot,makingbiggerovershoot.sigh...Ithoughtthroughitaftertheinterview,toolate...toobad...2.Iknowthereasonwhytheefficiencycanbeincreased.butIsitllhavenoideawhythebodyconductsfirst.3,Ireplyasbothoff,bodydiodeon,IamafraidIguessthecorrectanswer.4,sameas25,couldyoutellmelittlebitdetail.whatisthepracticallimitfortheselectionofcrossoverfrequency.onemorequestionIremembered.Q.thebenifitsofhighfrequency.IansweredwithsmallinductorandcapacitorsQ moreIanswered:increasethetransientresponseQ moreIdon'tknowanotherbenifitofthehighf,IjustknowthepricecouldbemoreswitchinglossandEMIproblem?whattheotherbenifitsonhighfrequency???thankstoobadformyfirstphoneinterview,IwishIcouldgetaon-site,whichisonFremont,SF.nowIlostit严重郁闷ing
1.其实在调节速度等一定的前提下,就跟负载阻尼系数有很大关系,重载驻尼系数大
5.开关频率决定了电容与电感的体积,而cross frequency 决定了快速性overshoot,高频噪声衰减,开关频率高则cross frequency 也可以做的高
根据采样定律:cross frequency 要小于0.2的开关频率
5.开关频率决定了电容与电感的体积,而cross frequency 决定了快速性overshoot,高频噪声衰减,开关频率高则cross frequency 也可以做的高
根据采样定律:cross frequency 要小于0.2的开关频率
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@gunking
谢谢你的回帖.那公司不错,在湾区,可惜我面试搞砸了,咳,准备工作方向不对,他一上来就直接问很基本的关于同步整流buckconverter的问题.我准备的问题却是其它公司同类产品的指标和技术.问题是很基本,可惜我没有翻翻自己准备的葵花宝典.很多问题知道个大概,不知道详细的原理.可惜可惜
嗨,这位兄台的英语不错呀,
我可以请问一下,你说你应聘搞砸的那个公司是什么公司吗,具体名称,放心我不是去应聘,我只是想寻找是否有合作的机会(我是业务,我司是做过压过流保护元件),在此小弟像各位大哥请教,谁知道广东这边有那些大的工厂需要这些电子元件(事成后必重谢)
我可以请问一下,你说你应聘搞砸的那个公司是什么公司吗,具体名称,放心我不是去应聘,我只是想寻找是否有合作的机会(我是业务,我司是做过压过流保护元件),在此小弟像各位大哥请教,谁知道广东这边有那些大的工厂需要这些电子元件(事成后必重谢)
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@jackyluo
1.其实在调节速度等一定的前提下,就跟负载阻尼系数有很大关系,重载驻尼系数大5.开关频率决定了电容与电感的体积,而crossfrequency决定了快速性overshoot,高频噪声衰减,开关频率高则crossfrequency也可以做的高根据采样定律:crossfrequency要小于0.2的开关频率
I think should be that phase margin determines the overshoot while the crossover frequency (bandwidth) determines the the response speed...
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这些都是些基本且重要的问题,对DC/DC来说.
我来回答一下:
1)减低负载时的过冲大,负载突然减少时占空比要能迅速减小才能有效抑制过冲,但此电源占空比非常小,缺少迅速减少的空间,此时电感的储能使电容电压升的很高.但加载时由于有足够的占空比,就不存在此问题.
2)并联肖特级为了提高效率,因为在死区时间时MOS的体二极管要导通,但体二极管的压降较大,用肖特级压降低,可提高效率.
3)死区时间,上下MOS是关断状态(死区的含义),shottky diode导通.
4)shottky diode. 我认为可能你听错了这题,应该问:low side mos and shottky diode谁先导通,然后谁承担电流.应该是shottky diode先导通,然后MOS承担电流.
5)有好几个因素:斜坡匹配(电压电流方式都有),运放增益带宽积,香农定理的带宽远在此以上,是极限的极限,也就是说不用考虑.
我来回答一下:
1)减低负载时的过冲大,负载突然减少时占空比要能迅速减小才能有效抑制过冲,但此电源占空比非常小,缺少迅速减少的空间,此时电感的储能使电容电压升的很高.但加载时由于有足够的占空比,就不存在此问题.
2)并联肖特级为了提高效率,因为在死区时间时MOS的体二极管要导通,但体二极管的压降较大,用肖特级压降低,可提高效率.
3)死区时间,上下MOS是关断状态(死区的含义),shottky diode导通.
4)shottky diode. 我认为可能你听错了这题,应该问:low side mos and shottky diode谁先导通,然后谁承担电流.应该是shottky diode先导通,然后MOS承担电流.
5)有好几个因素:斜坡匹配(电压电流方式都有),运放增益带宽积,香农定理的带宽远在此以上,是极限的极限,也就是说不用考虑.
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@cmg
这些都是些基本且重要的问题,对DC/DC来说.我来回答一下:1)减低负载时的过冲大,负载突然减少时占空比要能迅速减小才能有效抑制过冲,但此电源占空比非常小,缺少迅速减少的空间,此时电感的储能使电容电压升的很高.但加载时由于有足够的占空比,就不存在此问题.2)并联肖特级为了提高效率,因为在死区时间时MOS的体二极管要导通,但体二极管的压降较大,用肖特级压降低,可提高效率.3)死区时间,上下MOS是关断状态(死区的含义),shottkydiode导通.4)shottkydiode.我认为可能你听错了这题,应该问:lowsidemosandshottkydiode谁先导通,然后谁承担电流.应该是shottkydiode先导通,然后MOS承担电流.5)有好几个因素:斜坡匹配(电压电流方式都有),运放增益带宽积,香农定理的带宽远在此以上,是极限的极限,也就是说不用考虑.
其实:具体是加载还是减载时过冲大应根据工作的占空比和电路的可以达到的最大占空比有关.如在占空比未饱和下跟交越f和输出电容和esr有关
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@cmg
这些都是些基本且重要的问题,对DC/DC来说.我来回答一下:1)减低负载时的过冲大,负载突然减少时占空比要能迅速减小才能有效抑制过冲,但此电源占空比非常小,缺少迅速减少的空间,此时电感的储能使电容电压升的很高.但加载时由于有足够的占空比,就不存在此问题.2)并联肖特级为了提高效率,因为在死区时间时MOS的体二极管要导通,但体二极管的压降较大,用肖特级压降低,可提高效率.3)死区时间,上下MOS是关断状态(死区的含义),shottkydiode导通.4)shottkydiode.我认为可能你听错了这题,应该问:lowsidemosandshottkydiode谁先导通,然后谁承担电流.应该是shottkydiode先导通,然后MOS承担电流.5)有好几个因素:斜坡匹配(电压电流方式都有),运放增益带宽积,香农定理的带宽远在此以上,是极限的极限,也就是说不用考虑.
hi,CMG,
thank you for your reply, yes, I agreed with you, these questions are quite foundamental. I did't make a good reparation for it. if I had some previouse experience and I could clam down, and think a little bit, these questions are not difficult. I thought and knew most of the answers just after the interview. anyway, I do have some experience to deal with techinique interview, hope I were lucky enough to get another interview soon and I could muc better. thanks again,
thank you for your reply, yes, I agreed with you, these questions are quite foundamental. I did't make a good reparation for it. if I had some previouse experience and I could clam down, and think a little bit, these questions are not difficult. I thought and knew most of the answers just after the interview. anyway, I do have some experience to deal with techinique interview, hope I were lucky enough to get another interview soon and I could muc better. thanks again,
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@jackyluo
其实:具体是加载还是减载时过冲大应根据工作的占空比和电路的可以达到的最大占空比有关.如在占空比未饱和下跟交越f和输出电容和esr有关
过冲是与占空比有关,所以面试题目特别指出是16V to 1V,在这种情况下占空比是很小的,所以是减载上冲大.下面有实例.
其实对一般DC/DC,在占空比未饱和时,实际上加减载过冲是差不多的,如果不考虑杂散电感的影响(其脉冲非常窄,如果示波器带宽不够就看不到,如果这个也认为是过冲,则加减载是完全一样的).如果非要深究,应该是加载过冲大,为什么呢?因为动态负载瞬间,反馈电路是来不及动作的,这时过冲是由电容容量和ESR决定的,对加减载来说,ESR的影响是一样的,但容量的影响是不一样的,加载:1/2*C{(V+&)平方-V平方}; 减载:1/2*C{V平方-(V-#)平方};V为正常输出电压,加减载瞬间电量变化是一样的,所以&<#,既加载过冲大. 这是对你第二个问题的直接答案,“有关”是个模糊的概念.
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其实对一般DC/DC,在占空比未饱和时,实际上加减载过冲是差不多的,如果不考虑杂散电感的影响(其脉冲非常窄,如果示波器带宽不够就看不到,如果这个也认为是过冲,则加减载是完全一样的).如果非要深究,应该是加载过冲大,为什么呢?因为动态负载瞬间,反馈电路是来不及动作的,这时过冲是由电容容量和ESR决定的,对加减载来说,ESR的影响是一样的,但容量的影响是不一样的,加载:1/2*C{(V+&)平方-V平方}; 减载:1/2*C{V平方-(V-#)平方};V为正常输出电压,加减载瞬间电量变化是一样的,所以&<#,既加载过冲大. 这是对你第二个问题的直接答案,“有关”是个模糊的概念.
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@cmg
过冲是与占空比有关,所以面试题目特别指出是16Vto1V,在这种情况下占空比是很小的,所以是减载上冲大.下面有实例. 其实对一般DC/DC,在占空比未饱和时,实际上加减载过冲是差不多的,如果不考虑杂散电感的影响(其脉冲非常窄,如果示波器带宽不够就看不到,如果这个也认为是过冲,则加减载是完全一样的).如果非要深究,应该是加载过冲大,为什么呢?因为动态负载瞬间,反馈电路是来不及动作的,这时过冲是由电容容量和ESR决定的,对加减载来说,ESR的影响是一样的,但容量的影响是不一样的,加载:1/2*C{(V+&)平方-V平方};减载:1/2*C{V平方-(V-#)平方};V为正常输出电压,加减载瞬间电量变化是一样的,所以&
这个问题分析起来有很多现象,具体可以在ieee上关于vrm的文章中有介绍
cmg问你个问题:在dcm pfc中在电感和整流桥之间加个pi滤波,那个pi的电感感直高(800uH),他不参与能量的传送吗,如不,那么大的值对工作有影响不
cmg问你个问题:在dcm pfc中在电感和整流桥之间加个pi滤波,那个pi的电感感直高(800uH),他不参与能量的传送吗,如不,那么大的值对工作有影响不
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@gunking
hi,CMG,thankyouforyourreply,yes,Iagreedwithyou,thesequestionsarequitefoundamental.Idid'tmakeagoodreparationforit.ifIhadsomepreviouseexperienceandIcouldclamdown,andthinkalittlebit,thesequestionsarenotdifficult.Ithoughtandknewmostoftheanswersjustaftertheinterview.anyway,Idohavesomeexperiencetodealwithtechiniqueinterview,hopeIwereluckyenoughtogetanotherinterviewsoonandIcouldmucbetter.thanksagain,
弱弱問個問題:交叉 frequensy在開關電源中的定義與用處?什麼是香儂定理?
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@lucky_xhq
我有不同意见,我认为dutycycle不会随着负载的变化而有大的变化,只要看看它的基本公式就知道了,即使有变化也是为了弥补电流增大带来的效率损失,而不是为了提供负载电流,(它与dutycycle是没有关系的.)所以我觉得应该是一样过冲应该一样,欢迎提供不同意见!另外想问个问题,宵特基二极管的反向恢复时间小,增加效率,但是有一样不明白,就是到底什么是反向恢复时间,还有它为什么降低效率?谢谢!
根据我看一些IC的data sheet, 在high input low output的应用中,确实是加载时overshoot大.我觉得是因为此时的duty实际很低.没有什么减少的空间,而瞬间增多的空间大.
二极管由导通到截至,正向电流减小到零后有一个很短的反向电流时间trr,在回到零(forward leakage>0).trr就是反向恢复时间.时间越长,带来越大loss
二极管由导通到截至,正向电流减小到零后有一个很短的反向电流时间trr,在回到零(forward leakage>0).trr就是反向恢复时间.时间越长,带来越大loss
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