24V10W的变压器需要三明治绕法吗

请大吓指教

不用

能说说是为什么吗?

温升和效率不会象大功率的那么敏感

需要采用什么绕法,不是简单的跟输出电压,输出功率有关的,他跟你的变压器的要求有关系,三明知绕法能减小你的变压器的漏感,进一步就是能降低你的EMI及噪声,如果你的电源对于这些都没有要求的话,你可以不采用,如果对这些有要求,那你就的考虑考虑,否则你会需要一些额外的电路来消除变压器的漏感等产生的影响.

谢谢你

这种方法可以吗?如图
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我忘记在哪里看到的了,去磁绕组要求跟主绕组耦合越紧越好,你这个偶合的最差吧

Electrical Characteristics
(TA = +25oC unless otherwise stated, VCC=15.0V)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply Voltage (Vcc Pin)
Startup Current 8 20 μA
VCOMP=0V 2.0 3.0 mA
VCOMP=3V 2.5 mA
Operating Current
(with 1nF load on OUT pin)
Protection tripped (OLP, OVP) 0.5 mA
UVLO (off) 9.0 10.0 11.0 V
UVLO (on) 15.0 16.0 17.0 V
LD7530 26.8 28.0 29.2 V
OVP Level
LD7530A 19.8 21.0 22.2 V
Voltage Feedback (Comp Pin)
Short Circuit Current VCOMP=0V 1.5 2.2 mA
Open Loop Voltage COMP pin open 6.0 V
Green Mode Threshold VCOMP 2.35 V
Current Sensing (CS Pin)
Maximum Input Voltage, Vcs(off) 0.80 0.85 0.90 V
Leading Edge Blanking Time 200 nS
Input impedance 1 MΩ
Delay to Output 100 nS
Oscillator for Switching Frequency
Frequency 60 65 70 KHz
Green Mode Frequency 20 KHz
Trembling Frequency ± 3.5 KHz
Temp. Stability (-40°C ~105°C) 3 %
Voltage Stability (VCC=11V-25V) 1 %
Low Frequency Timer (CT Pin)
Low Frequency Period 4.7 mS
Gate Drive Output (OUT Pin)
Output Low Level VCC=15V, Io=20mA 1 V
Output High Level VCC=15V, Io=20mA 8 V
Rising Time Load Capacitance=1000pF 50 200 nS
Falling Time Load Capacitance=1000pF 30 100 nS
OLP (Over Load Protection)
OLP Trip Level Vcomp(OLP) 5.0 V
OLP Delay Time(note) CT=0.047μF 50 mS
The OLP delay time is proportional to capacitance of CT pin.500) {this.resized=true; this.width=500; this.alt='这是一张缩略图，点击可放大。\n按住CTRL，滚动鼠标滚轮可自由缩放';this.style.cursor='hand'}" onclick="if(!this.resized) {return true;} else {window.open('http://u.dianyuan.com/bbs/u/72/981091230624205.jpg');}" onmousewheel="return imgzoom(this);">

芯片是用通嘉的LD7530,输入:200VAC-260VAC
                    输出:DC30V500mA
待机功耗是0.53W,不知道怎么样可以降下来,
请DX指点指点.

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这样做可以吗?

怎么没有人回答呀