关于90W 电源适配器方案
谁能帮忙提供如下规格电源的方案给我.
1.INPUT AC 100~240V 50/60Hz
2. OUTPUT 19V 4.74A 90W + PFC
3. CASE: 140L*60W*34H
谢谢! E——MAIL: xuliwu15@163.com
关于90W 电源适配器方案
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@ws0905
ML4803是PWM+PFC芯片,线路比较简单
PFC Current Sense Filtering
In DCM, the input current wave shaping technique used by the FAN4803 could cause the input current to run away. In order for this technique to be able to operate properly under DCM, the programming ramp must meet the boost inductor current down-slope at zero amps. Assuming the programming ramp is zero under light load, the OFF-time will be terminated once the inductor current reaches zero.Subsequently the PFC gate drive is initiated, eliminating the necessary dead time needed for the DCM mode. This forces the output to run away until the VCC OVP shuts down the PFC. This situation is corrected by adding an offset voltage to the current sense signal, which forces the duty cycle to zero at light loads. This offset prevents the PFC from operat-ing in the DCM and forces pulse-skipping from CCM to no-duty, avoiding DMC operation. External filtering to the cur-rent sense signal helps to smooth out the sense signal, expanding the operating range slightly into the DCM range, but this should be done carefully, as this filtering also reduces the bandwidth of the signal feeding the pulse-by-pulse current limit signal. Figure 9 displays a typical circuit for adding offset to ISENSE at light loads.
图9见PDF文件,我搞不明白那个偏置电路是怎么原理!各位高手请帮我指点指点!1095181968.pdf
In DCM, the input current wave shaping technique used by the FAN4803 could cause the input current to run away. In order for this technique to be able to operate properly under DCM, the programming ramp must meet the boost inductor current down-slope at zero amps. Assuming the programming ramp is zero under light load, the OFF-time will be terminated once the inductor current reaches zero.Subsequently the PFC gate drive is initiated, eliminating the necessary dead time needed for the DCM mode. This forces the output to run away until the VCC OVP shuts down the PFC. This situation is corrected by adding an offset voltage to the current sense signal, which forces the duty cycle to zero at light loads. This offset prevents the PFC from operat-ing in the DCM and forces pulse-skipping from CCM to no-duty, avoiding DMC operation. External filtering to the cur-rent sense signal helps to smooth out the sense signal, expanding the operating range slightly into the DCM range, but this should be done carefully, as this filtering also reduces the bandwidth of the signal feeding the pulse-by-pulse current limit signal. Figure 9 displays a typical circuit for adding offset to ISENSE at light loads.
图9见PDF文件,我搞不明白那个偏置电路是怎么原理!各位高手请帮我指点指点!1095181968.pdf
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